Improved SoC Design Productivity is a Beautiful Thing

John Swan – visit

Over 20 years of SoC design and design methodology.  Introduced HDL methodology into Motorola's Corporate R&D Labs.  Then after rigorous hands-on use of HDL methodology on a major multimedia chipset, supported initial research into the viability of behavioral synthesis on projects around the company.

New tools and methodologies are available to take your industry beyond RTL. And if implemented properly, another leap in SoC design productivity can be achieved that is similar to the leap in improvement provided by the use of HDL methodology at RTL.

Profile available on LinkedIn at

  • B.S.E.E. Computer Engineering (High Honors), Illinois Institute of Technology
  • M.B.A., Roosevelt University
  • Senior Member of the IEEE:
    • Computer Society - Chair of Silicon Valley Chapter in 2010 & 2011
      • 2012 Computer Society Meritorious Award (see News tab)
      • 2012 Computer Society Golden Core Award  (see News tab)
John is currently employed by Intel Corp. in Silicon Valley.